Applied Micro Circuits and Canonical planned to demonstrate an OpenStack cloud running on a rack of ARM servers at the Computex tradeshow Friday in Taiwan. Major server manufacturers, including Dell and HP, and original design manufacturers from around the world, such as Quanta, Avnet, and Hyve, were expected to view the demonstration.
ARM is the chip used in many smartphones and mobile devices, and it's not usually associated with either enterprise data centers or cloud computing. But Applied Micro will show a rack of 14 servers based on its X-Gene server chip. They will be running Icehouse, the latest version of OpenStack, under Canonical's Ubuntu Linux.
The demonstration will also show Apache web servers, SugarCRM open-source CRM, Hadoop, the Elasticsearch search engine, and the Mediawiki open-source code used to produce Wikipedia, Wiktionary, and Wikimedia Commons.
These high-profile applications are meant to show how typical, Intel x86-instruction-set software can be recompiled to run on the ARM architecture. The open-source GCC compiler for ARM "has matured considerably over the last year," said Gaurav Singh, VP of Applied Micro, in an interview Friday morning before the demonstration, to be held a day before the Computex show for computer manufacturers kicks off.
Singh said it's the first time 64-bit ARM chips have been assembled in a server rack with cloud software and mainstream applications available to run on them. "This is very exciting to us. It's not a trivial amount of work," he said of the software ports. Both Red Hat and Canonical have recompiled their Linux systems for use with ARM. The Linaro engineering project, founded in 2010, is also methodically porting open-source code over to ARM.
HP said in its Project Moonshot announcement in 2011 that it believes ARM servers will one day play a role in both the enterprise data center and cloud. At the Open Compute Summit in January, Andrew Feldman, corporate VP of AMD, predicted that ARM servers will make up 25% of the enterprise data center by 2019.
The architecture sips energy, compared to Intel's thirsty Xeons, and thus finds its way into mobile devices with limited battery life. Until recently, it was not considered viable silicon for servers because there were no 64-bit ARM chips. Also all previous ARM implementations required in-order instruction processing. IBM's Power, Sun's Sparc, and Intel's x86 are all used in servers because they are out-of-order instruction-processing CPUs: The chip can preview incoming instructions and decide in which order it wishes to process them for optimum performance. The technique is considered a requirement for any server architecture.
Singh said Applied Micro's 64-bit X-Gene chip is an out-of-order instruction processor. Applied Micro began sampling its 64-bit X-Gene chips to server makers last summer.
Asked to compare the processing power of an ARM CPU with an Intel CPU, Singh said the current 8-core X-Gene was roughly equivalent to older-generation, Intel E3 Xeon chips, such as the Nehalem processor, which became widely available in 2009. When compared to a current 8-core Xeon E5, such as Sandy Bridge, the X-Gene falls back to doing 75% to 80% of the E5's work, said Singh. His performance measure is the amount of application logic and related I/O that gets accomplished.
At the same time, X-Gene's purchase price is less than Xeon's, and it uses half the energy. X-Gene servers can be assembled with a density four times as great as Intel servers, giving them a smaller footprint in the data center, Singh claimed. That's the case in part because so many server components that are extra components on an Intel motherboard are built into the X-Gene chip. No network interface card is needed on an X-Gene motherboard, because it's been etched in. Likewise, no I/O controller or SATA storage controller is needed; they're also already there.
That makes the X-Gene server less greedy for power and allows densely packed ARM servers to run cooler, all of which reduces their total cost of ownership, Singh said.
The chip was also designed with hefty network bandwidth and data flow channels. It has four memory channels for loading data and 40 Gbit/s networking capacity. The chip is designed to run at a 2.4 GHz frequency, roughly equivalent to low-end Sandy Bridge editions.
Comparing chips' performance is a notoriously difficult task. Multi-threaded server chips can outshine standard PC chips at certain number-crunching tasks, then look mediocre in a more routine job. Singh said he would show during the Icehouse demo Friday that the open-source Xen hypervisor performs well on X-Gene servers. He will use figures he got from Citrix, one of the 29 members of the Linaro project, that indicate the ARM chip runs Xen with only 1% of the processor used by the hypervisor itself. A more typical figure on x86 chips is 2% or 2.5%, said Singh.
Singh said he was told that the performance gain probably results from the port of Xen to ARM that was able to leave behind "crud" or little-used code in the x86 version. Xen compiled for x86 and other x86 software may include code for earlier versions of the x86 instruction set, given the architecture's many iterations and long history. Compilations for X-Gene need to be compatible only with the first version of the chip. Nevertheless, if that performance advantage can be clearly established, X-Gene's reputation for efficient execution will have a better chance of being established.
Singh claimed that use of Applied Micro ARM-based servers could reduce the cost of server ownership by 50% over three years and 70% over years of operation, due to the lower purchase price and power savings.
Such savings may turn out to be pie in the sky, if there are hidden costs in faulty conversions of x86 software to ARM or other unforeseen expenses. But for Singh in Taiwan, a moment of truth has arrived. Not only is ARM ready for servers, it is ready for banks of them in the cloud, and he's hoping a demonstration of OpenStack on X-Gene will prove it.